This release note covers the initial features of the TASKING TriCore v6.2r2 Inspector v1.0r4.
For release notes prior to v1.0r4, please visit the TASKING TriCore Inspector support website.
TriCore v6.2r2 Inspector v1.0r4 is based on TASKING VX-toolset for TriCore v6.2r2 patch 2. Inspector operates identically to the VX-toolset (except for the issue detection) down to the Linker.
Generation of the final executable image by the linker has been disabled.
Components of the VX-toolset dealing with the final executable image, library sources and examples have been removed from the product.
Components modified for the issue detection have been renamed with prefix insp_ (insp_cctc, insp_cptc, insp_ctc, insp_astc, insp_ltc).
You can use the TASKING Inspector v1.0r4 for the TASKING VX-toolset for TriCore v6.2r2 product and any of the patches, with the following restrictions:
The inspector components now also silently accept the given detection options meant for other components. This prevents errors when e.g. passing an option file to all tools with a list of --detect or --ignore detector options.
All executable files in this release have the following build number: Build 23071738.
By default, Inspector detects and reports full set of supported issues. The following options allow the user to customize this set:
--ignore=<issue-id>,... - disables detection of specified issues.
--detect=<issue-id>,... - disables detection of all issues and enables detection of specified issues only.
These options are supported by the Control Program, C/C++ Compiler, Assembler and Linker. Issue ID corresponds to issue's identification on the TASKING Issue Portal.
Inspector indicates issue detection by producing a warning message in two possible ways:
1. Definite detection.
Reported when Inspector can guarantee by detector's construction that the processed code is affected by the triggered issue. Note that the affected code may still be removed from the final executable image by subsequent optimizations or linker - this requires manual verification.
Example: ctc W999: [25/12] [INSP] detected occurrence of issue TCVX-44082.
2. Potential detection.
Reported when the issue is triggered, but Inspector can not guarantee that the processed code has been affected. Location and/or some additional information will be reported to facilitate verification by the user.
Example: ctc W998: [10/29] [INSP] detected potential occurrence of issue TCVX-43595.
Some potential detectors produce a lot of false positives. To narrow the processing, assembly comparison mode is introduced.
--detect-asm=<issue-id> - with this option Inspector only detects a single specified issue.
After initial potential detection Inspector generates two instances of assembly code - affected and not affected by the issue.
If the comparison of these generated assembly files produces any meaningful difference, Inspector reports it and indicates locations of the generated files for the further analysis.
Inspector supports separate logging of detection messages.
--insp-log=<file> - with this option all detection messages are duplicated into the specified file.
The log file is written in append mode and clearing it at the right moment is your responsibility
The logging mechanism supports concurrent writing for the multi-threaded build, but file locking over network is unreliable, so it shouldn't be used with a remotely located log file.
| Detector | Summary | SIL level | Inspector component(s) | Assembly comparison | Issue detection |
|---|---|---|---|---|---|
| TCVX-34183 | Assembler should by default make code sections at least 2 byte aligned | SIL-2 | insp_ltc | Definite | |
| TCVX-39025 | LSL: prevent an allocation of the user stack in the PCP memory | SIL-2 | insp_ltc | Definite | |
| TCVX-40469 | Linker allows cloned sections outside the available DSPR0 memory range | SIL-2 | insp_ltc | Definite | |
| TCVX-40928 | AURIX multi-core: hex file does not contain code for cloned functions in ROM | SIL-2 | insp_ltc | Definite | |
| TCVX-41279 | Issues with designated initializers for an element of an array of structs | SIL-2 | insp_ctc | Potential | |
| TCVX-43102 | Optimization of struct return may lead to overlapping struct copy | SIL-2 | insp_ctc | Potential | |
| TCVX-43123 | Assembler astc --core=tc1.6.2 silently processed deprecated instruction mulms.h | SIL-2 | insp_astc | Definite | |
| TCVX-43189 | Memory settings for DFLASH for TC21x and TC22x are wrong | SIL-2 | insp_ltc | Definite | |
| TCVX-43195 | Linker misplaces .alignment_protection sections in reserved memory or a reserved section without notice | SIL-2 | insp_ltc | Definite | |
| TCVX-43219 | Control program silently changes floating-point settings when --eabi-compliant option is used | SIL-2 | insp_cctc | Definite | |
| TCVX-43543 | Sizeof operator applied to a VLA involving variable post-modification causes wrong code | SIL-2 | insp_ctc | ✔ | Potential |
| TCVX-43546 | Linker does not insert alignment_protection sections when a group includes sections with a different alignment | SIL-2 | insp_ltc | Definite | |
| TCVX-43579 | Incorrect alignment for bit-field of size 0 with --eabi=-char-bitfield | SIL-2 | insp_ctc | Definite | |
| TCVX-43580 | Alignment for bit-field of size 0 does not conform to the TriCore EABI | SIL-2 | insp_cptc, insp_ctc | Definite | |
| TCVX-43587 | GLO tracker optimization problem for unitialized variable | SIL-2 | insp_ctc | ✔ | Potential |
| TCVX-43595 | LSL reserved sections may be selected by select statements resulting in a corrupt internal linker state | SIL-2 | insp_ltc | Definite | |
| TCVX-43610 | Copy table in output section overwritten by next section in output section | SIL-2 | insp_ltc | Potential | |
| TCVX-43696 | Reading elements of a const aggregate object as a larger type may result in an incorrect value. | SIL-4 | insp_ctc | Definite | |
| TCVX-43704 | Non justified if condition optimization | SIL-3 | insp_ctc | Potential | |
| TCVX-43855 | Bitfield of type "short int" or "long int" is treated as unsigned | SIL-2 | insp_ctc | Definite | |
| TCVX-43868 | Run-time error for double _Complex expression passing to a function | SIL-3 | insp_ctc | Definite | |
| TCVX-43893 | C compiler omits value assignment to pointer type function argument with forward store optimization enabled | SIL-4 | insp_ctc | ✔ | Potential |
| TCVX-43913 | Compile-time concatenation of character string literal with unicode string literal fails | SIL-2 | insp_ctc | Definite | |
| TCVX-43915 | Unroll small loops optimization leads to wrong code when speed tradeoff -t0 used | SIL-3 | insp_ctc | Definite | |
| TCVX-43916 | C compiler - Generic Assembly Code optimization leads to false array index location in loop | SIL-4 | insp_ctc | Definite | |
| TCVX-43928 | Incorrect reordering of volatile memory reads | SIL-4 | insp_ctc | Potential | |
| TCVX-43980 | Linker may hang when the size of an output section is at least 2 MB | SIL-2 | insp_ltc | Definite | |
| TCVX-43986 | AURIX 2G LSL files allow duplicate TriCore vector handlers to be located in SCR xram | SIL-2 | insp_ltc | Potential | |
| TCVX-43994 | Linker ltc allows duplicate interrupt vectors to be located in vector table | SIL-3 | insp_ltc | Potential | |
| TCVX-43998 | Invalid constant propagation with tripple indirection | SIL-2 | insp_ctc | ✔ | Potential |
| TCVX-44008 | Include file may be skipped when same filename is included from different directories | SIL-2 | insp_ctc, insp_ltc | Definite | |
| TCVX-44014 | Missing initialization for local variable in a specific test case | SIL-3 | insp_ctc | Potential | |
| TCVX-44043 | Incorrect conversion of _Complex type to _Bool | SIL-3 | insp_ctc | Mixed | |
| TCVX-44050 | Linker inserts section in an ordered, contiguous, fill group | SIL-2 | insp_ltc | Potential | |
| TCVX-44077 | C compiler generates malloc call for variable length array | SIL-2 | insp_ctc | Definite | |
| TCVX-44082 | Intrinsics __extracthwN and __extractbbyteN may return wrong result | SIL-3 | insp_ctc | Definite | |
| TCVX-44102 | Loop invariant code optimization issue | SIL-3 | insp_ctc | Potential | |
| TCVX-44201 | Linker - clone .text .clone code sections missing in copytable when using --non-romable option | SIL-2 | insp_ltc | Definite | |
| TCVX-44218 | Large floating-point numbers become zero when converted to _Float16 | SIL-3 | insp_ctc | Potential | |
| TCVX-44224 | Wrong result multiplying two INIFINITY values when using software floating-point library | SIL-3 | insp_ctc | Potential | |
| TCVX-44237 | Illegal double word access to SFR register range | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44257 | Compiler violates EABI due to 4 byte user stack frame generation | SIL-3 | insp_ctc | Definite | |
| TCVX-44267 | Linker: option --whole-archive ignores object modules without exported symbols | SIL-2 | insp_ltc | Definite | |
| TCVX-44278 | C++ compiler: generated code results in address 0x0000000 access causing bus trap | SIL-2 | insp_cptc | Potential | |
| TCVX-44309 | MISRA C 2012 rule 10.4 checker reports false positive and fails to detect a violation | SIL-3 | insp_ctc | Potential | |
| TCVX-44339 | Subnormal values may incorrectly compare equal to zero | SIL-3 | insp_ctc | Potential | |
| TCVX-44383 | For non-trapping floating point comparisons: NaN == NaN incorrectly returns true | SIL-3 | insp_ctc | Potential | |
| TCVX-44387 | Erroneous code in code compaction function leads to invalid function parameter | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44393 | Compiler issues double word accesses for data located in MCS memory | SIL-3 | insp_ctc | Potential | |
| TCVX-44400 | Wrong value is loaded into a 48-bit struct if used as a member of a larger 64-bit struct | SIL-3 | insp_ctc | Potential | |
| TCVX-44407 | C compiler front-end may produce imprecise FP result (±1 bit difference) | SIL-4 | insp_ctc, insp_ltc | ✔ | Potential |
| TCVX-44417 | Compiler generates wrong code for loops with 64-bit iterators | SIL-2 | insp_ctc | Potential | |
| TCVX-44419 | Linker does not insert alignment_protection section when copy_unit is greater than 1 | SIL-2 | insp_ltc | Potential | |
| TCVX-44421 | Conversion of float to integer raises "Overflow" instead of "Invalid operation" exception | SIL-3 | insp_ctc | Potential | |
| TCVX-44423 | libfprt: subnormal values incorrectly compare equal to zero | SIL-3 | insp_ctc | Potential | |
| TCVX-44426 | FPU version of C library is not selected with control program option --fp-model=St | SIL-2 | insp_cctc | Definite | |
| TCVX-44441 | Incorrect use of a loop instruction | SIL-3 | insp_ctc | Definite | |
| TCVX-44443 | Intrinsics __getbyteN and __gethwN may return wrong result | SIL-3 | insp_ctc | Definite | |
| TCVX-44453 | Incorrect propagation of __pure__ function call result | SIL-3 | insp_ctc | Definite | |
| TCVX-44461 | No error on narrowing conversion from char to bool | SIL-2 | insp_cptc | Potential | |
| TCVX-44522 | The __dsync() intrinsic does not always work as a memory fence | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44541 | FP library: QNAN used in IEEE 754 arithmetic operations and in IEEE 754 unordered-quiet predicates leads to incorrect raising of FE_INVALID exception | SIL-2 | insp_ctc | Potential | |
| TCVX-44642 | Common subexpression elimination optimization may violate #pragma STDC FENV_ACCESS ON | SIL-3 | insp_ctc | Potential | |
| TCVX-44645 | TriCore compiler may generate double word access instructions to peripheral memory | SIL-3 | insp_ctc | Potential | |
| TCVX-44670 | Type conversions involving _Bool may produce wrong result | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44674 | The address values for FFT Accelerator in register files for tc26xb are incorrect | SIL-2 | insp_ctc, insp_astc, insp_ltc | Mixed | |
| TCVX-44677 | Erroneous code ignoring a break condition in an endless loop | SIL-3 | insp_ctc | Definite | |
| TCVX-44684 | Erroneous code generated using generic assembly code optimizations | SIL-3 | insp_ctc | Definite | |
| TCVX-44737 | Compiler generates wrong code | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44738 | C compiler: wrong code generation for float-to-int conversion when using #pragma STDC FENV_ACCESS ON: no FE_INVALID is raised | SIL-2 | insp_ctc | ✔ | Potential |
| TCVX-44743 | Control flow simplification optimization may violate #pragma STDC FENV_ACCESS ON | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44744 | Constant propagation optimization may violate #pragma STDC FENV_ACCESS ON | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44751 | Incorrect optimization of left-shift operator | SIL-3 | insp_ctc | Definite | |
| TCVX-44759 | C compiler: incorrect optimization of conditional multiple variable access | SIL-3 | insp_ctc | Definite | |
| TCVX-44769 | Conversion double-to-float may produce 0 instead of FLT_MIN | SIL-3 | insp_ctc | Potential | |
| TCVX-44776 | Function @FLD accepts negative arguments with undefined behavior | SIL-2 | insp_astc | Definite | |
| TCVX-44792 | Erroneous code generation due to loop fusion optimization | SIL-3 | insp_ctc | Definite | |
| TCVX-44793 | C compiler: missing truncation for cast that is converted to _Bool | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44796 | FPU instructions may corrupt 64-bit integer computations | SIL-4 | insp_ctc | Potential | |
| TCVX-44802 | Non EABI compliant bitfield offset used in a struct with a structsize larger than 32 bit | SIL-4 | insp_ctc | ✔ | Mixed |
| TCVX-44808 | C compiler: incorrect integer promotion using expression simplification optimization | SIL-3 | insp_ctc | Potential | |
| TCVX-44817 | DSP-C: operations on __sfract / __wrap __sfract may produce incorrect results | SIL-4 | insp_ctc | Potential | |
| TCVX-44836 | Missing zero-extend for indirect store to _Bool automatic variable | SIL-4 | insp_ctc | Definite | |
| TCVX-44839 | DSP-C: Constant folding involving fixed-point types may produce incorrect results | SIL-4 | insp_ctc | Mixed | |
| TCVX-44840 | C compiler: Incorrect CSE of VLA size expression | SIL-3 | insp_ctc | Definite | |
| TCVX-44843 | C compiler: unexpected "Assertion failed" when using _Alignas for an object with block scope | SIL-3 | insp_ctc | Definite | |
| TCVX-44846 | C compiler: flexible array member initialization: diagnostics may be missing | SIL-2 | insp_ctc | Mixed | |
| TCVX-44878 | Evaluation of floating expressions involving NaN may produce wrong results | SIL-4 | insp_ctc | Potential | |
| TCVX-44903 | Compiler overwrites a complete byte in a bitstruct whereas only two bits are modified | SIL-3 | insp_ctc | Definite | |
| TCVX-44907 | Wrong code generation for an if-else statement | SIL-3 | insp_ctc | Potential | |
| TCVX-44912 | Optimization ignores __weak__ attribute in the code | SIL-3 | insp_ctc | ✔ | Potential |
| TCVX-44913 | Erroneous code generated for C++ code using __disable_and_save and __restore intrinsics | SIL-4 | insp_ctc | Potential | |
| TCVX-44935 | User stack demand higher than calculated by the C compiler | SIL-2 | insp_ltc | Potential | |
| TCVX-44959 | Control program: incorrect handling of -L option without argument | SIL-2 | insp_cctc | Definite | |
| TCVX-45025 | C Compiler: _Bool - incorrect expression evaluation | SIL-3 | insp_ctc | Definite | |
| TCVX-45026 | Compiler conducts a signed division instead of an unsigned one in a specific use case | SIL-3 | insp_ctc | Definite | |
| TCVX-45028 | C compiler ignores cast in a specific use case for a function return value | SIL-4 | insp_ctc | ✔ | Potential |
| TCVX-45069 | Flow optimization causes missing read operation | SIL-4 | insp_ctc | Potential |
These issues have been deemed impossible to detect in any meaningful way during compilation. User manual contains a detailed description of the situation when the issue might occur.
TASKING products are protected with TASKING license management software.
You need a license key when you install a TASKING product on a computer. When you order a TASKING product from TASKING or one of its distributors, a license key will be sent to you by email or on paper.
See the TASKING TriCore v6.2r2 Inspector User Guide for information on obtaining a license.
If you have ordered a TASKING product with a floating license, you can have it serviced by the Remote TASKING License Server (the most convenient solution) or through a Local TASKING License Server (in case you have no external network access for example). Consult your TASKING representative for assistance on deciding what the best setup would be for your situation.
If you like to setup up a local license server, we kindly refer you for more information to Support for TASKING License Management System (TLM) on our website. Here you can also download the Local TASKING License Server package.
It is advised that you install the Local TASKING License Server before you install products that require this server.