This release note covers version v8.5r1. It describes the changes and new features of all TASKING C166/ST10 products since v8.0r1.
The following sections are included in this release note:
FLEXLM v8.4a
C COMPILER
ASSEMBLER AND LINKER/LOCATOR
CROSSVIEW PRO
Summary of changes between v8.0r2 and v8.5r1:
Summary of changes between v8.0r1 and v8.0r2:
Solved and known problems as well as known restrictions are listed in a separate file: solved_8_5r1.html.
Important notice for floating license users:
This product includes a new version of the FLEXlm license manager. This version solves a range of known problems with license management and adds:
| Borrowing | Use a floating license on your laptop while disconnected from the network. |
| Wait for License | The default behavior of the tools is that if no license is
available at the moment (i.e., all licenses are in use) the tool stops with
an error message. If the environment variable TASKING_LIC_WAIT is set to an arbitrary value, the tool will wait until license becomes available. |
Please make sure you are using version 8.4a or higher of the license manager. If you are using an older version of the license manager, you could get the following error message:
Invalid (inconsistent) license key(-8,544)
Update your license manager to at least version 8.4a, as supplied on the product CD.
If you are already using a newer version of the license manager (supplied by
other vendors) make sure you are using v8.4a of the TASKING daemon (Tasking or
Tasking.exe) included in this product (install-dir\flexlm\Tasking.exe or
install-dir/flexlm/Tasking).
In the register settings in the startup code it is now possible to preserve the value of bits that are externally set by the hardware, such as the BTYP0 bits in the BUSCON0 register. A checkbox has been added on the pages of these registers to preserve these bits at startup.
In EDE the simulator is now selected separately from selecting a board. From the Project -> Project Options dialog select CrossView Pro and then select the Execution Environment page. On this page a checkbox "Use simulator" has been added. With this checkbox enabled the simulator is used, but memory reservations required for the selected board configuration are still made. This checkbox makes it easier to switch between a hardware and simulator environment.
In the huge memory model all objects are by default _huge. This is in fact the only difference with the large memory model. Objects smaller than the near data threshold (-T compiler option) are allocated in near memory. The huge model is selected by the compiler option -Mh.
The -x option (extended architecture/C167) is now the default. This means that the compiler can no longer generate code for classic 8xC166 and GOLD processors. The selection is now:
| -x | Extended architecture |
| -xd | Extended architecture with MAC unit |
| -x1 | C166S V1 core |
| -x2 | XC16x and Super10 |
| -x22 | Super10M345 extensions |
The C library now includes memory allocation functions for near, far, shuge, and huge data allocation:
| default | malloc() | calloc() | realoc() | free() |
| near | nmalloc() | ncalloc() | nrealoc() | nfree() |
| far | fmalloc() | fcalloc() | frealoc() | ffree() |
| shuge | smalloc() | scalloc() | srealoc() | sfree() |
| huge | hmalloc() | hcalloc() | hrealoc() | hfree() |
The linker/locator now supports multiple heaps for use with these functions.
The run time floating point libraries have two flavors: trapping and non-trapping. The trapping version is typically used for triggering problems such as divide by zero. As soon as it is known that the application will not run into such problems the non-trapping flavor can be used. With version 8.5 the non-trapping floating point libraries also do not check for valid inputs to improve the execution speed. The libraries will continue calculation with invalid input values. If the behavior of previous versions is required, the trapping floating point libraries should be used with an empty trap function.
The -r option and pragma regdef are improved to provide full control over the register bank allocation from the C compiler. The interface for the -r option and the pragma regdef are slightly changed.
For the XC16x and Super10 the instruction scheduler now assumes that there are 17 cycles between the DIV instruction and the availability of the result. To avoid pipeline stalls the compiler will try to schedule as much instructions as possible between the the DIV instruction and using its result.
The compiler has two new options to configure the messages for MISRA C to be generated as warnings instead of errors: -misrac-required-warnings for required rules and -misrac-advisory-warnings for advisory rules.
The -BZpec_int_after_cp Inserts an ATOMIC #3 before and 2 NOP operations after any updates of the CP register. This to avoid the CPU functional problem CPU_SEGPEC. See also the description with the assembler control CHECKCPPEC below.
The register files now also define registers outside the system page. The C header files use special constructs for selecting far or near addressing. By default far addressing is used. To use near addressing the near data page(s) must include the register address area and a define must be made before the inclusion of the register header file.
For example:
#define PAGE_3FF_REGISTERS_NEAR #include <regxc161cs.h>
To select the architecture, one of the following assembler controls must be used:
EXTEND
EXTEND1
EXTEND2
EXTEND22
EXTMAC
The following assembler controls are deprecated:
EXTMEM, EXTINSTR, EXTSFR, EXTPEC, EXTSSK
NOEXTMEM, NOEXTINSTR, NOEXTSFR, NOEXTPEC, NOEXTSSK
NOEXTEND, NOEXTEND1, NOEXTEND2, NOEXTEND22, NOEXTMAC
The assembler issues a warning when such control is used.
The EXTPEC16 and NOEXTPEC16 are unchanged.
The linker/locator now supports a far and a near heap, necessary to support the memory allocation functions added to the C library. This linker/locator now uses two sections:
| ?C166_NHEAP | for near memory allocation |
| ?C166_FHEAP | for allocation of far, shuge and huge memory |
The section ?C166_HEAP section is no longer generated, which means that
locator scripts referring to that section need to be updated.
The HEAPSIZE control now supports resizing two heaps.
The VECTAB control is extended with an optional argument to specify the vector table size in number of vectors.
Example:
VECTAB( 0, 255 ) ; vector table at address 0, with 255 as the highest vector number
The RAM keyword can be added to an address range in the RESERVE control to indicate that this reserved space contains readable and perhaps writable memory for simulator purposes. Ranges reserved with the RAM keyword are marked as RAM in the MAP file. The CrossView Pro simulator reads the map file to create its memory mapping.
Example:
RESERVE( MEMORY(0xE000 - 0xEFFF RAM) ) ; reserve IO-RAM area
The macropreprocessor m166 has a new INCLUDEPATH control. With this control the search path for include files can be specified. This control is additional to the M166INC environment variable.
The assembler a166 is extended with a new EXPANDREGBANK control. With this control enabled register banks are automatically updated with registers used in the code.
The BLOCK directive has been added to make blocks of register definitions in the register definition files (.def).
A new DEFX assembler directive is added to the assembler for defining registers that are outside the system page. For the assembler this directive is treated similar to an EQU direcitve. The CrossView Pro debugger also knows registers defined with the DEFX directive. The usage of the DEFX directive is similar to that of the DEFA directive:
name DEFX address [,attribute] [,method, reset, comment] ]
The MEMORY control of the linker/locator l166 has an optional
definition of a fill pattern for filling gaps between sections in a specified
memory range. You can specify either to fill only the gaps between the sections
or to fill out the full memory range.
The Project Options dialog in EDE has an updated Linker/Locator - memory page,
where the fill pattern can be added to a memory range.
The Infineon EWGold Lite core can have a problem when PEC interrupts arrive
to close together. This can cause a wrong SRCPx source value to be used for the
PEC transfer. The problem also occurs when the context pointer register CP is
explicitly modified. To work around this silicon problem, guard the offending
instructions against PEC interrupts through an EXTEND sequence. For explicit CP
modifications, the extend sequence needs to be 3 instructions at least, for the
SRCPx modifications, the sequence needs to be 2 instructions at least.
The CHECKPECCP control enables the check for explicit CP updates
not in an extend sequence with 3 or more instructions.
With version v8.0r2 The TASKING instruction set simulator has been improved for XC16x/Super10 support. This implies that the simulation is faster, that profiling and coverage are supported and that the timer peripherals are supported. The simulator does not take the processor's pipeline into account. Instruction cycles are counted in best case values and the fastest memory is assumed.
The simulator now supports three variants of mapping the simulator memory:
Using the map file can be controlled as follows:
When "using the map file" is enabled, a map file is used which has the same name as the absolute (.abs) file of the application, but with suffix .map.
When not using the map file, CrossView Pro will look into the target configuration file (.cfg) for memory mappings. If no mappings are given in the configuration file, the memory will be mapped dynamically.
When a memory location is accessed that is not mapped, CrossView Pro will stop execution just after the instruction that caused the problem and issues the message: "Program stopped: bus error on write to address XXXXX". This is usually caused by a problem in your program (for example, an incorrect pointer). Also using addresses in a program without allocating memory for it may result in this error.
The simulator is extended with peripheral support. The following peripherals are supported:
The SSC/ASC peripherals automatically get DIO (Debug Instrument I/O) streams assigned to terminal windows. These terminals can be used to display and enter data from and to these peripherals.
Special registers have been added to make the processor pins available within CrossView:
For testing your code with the simulator it is now possible to use CXL scripting. CXL is the CrossView eXtension Language and was formerly only available for scripts related to the graphical data window. New commands have been added for CXL scripting:
| cxl "file" | Executes the script file. |
| cxl_reset | Reset all CXL scripts. All CXL variables get initialized with 0 again. |
The CrossView reset commands implicitly also reset the CXL scripts as with
the cxl_reset command.
It is possible to add the cxl
command to a cycle breakpoint which hits every n cycles, or to a
instruction breakpoint which hits every instruction. This way a test pattern can
be supplied to the simulator.
Examples of peripheral simulation with CXL scripting are included. See the CrossView Pro manual for more information on peripheral simulation and CXL.
The Remote Evaluation Board Access Server has been added to the product. Installing this server allows you to share a RS-232 connected evaluation board over the network. The board is connected to the PC where the Remote Evaluation Board Access Server is running and all CrossView Pro ROM monitor debuggers can connect from any PC in the network to the server. The Remote Evaluation Board Access Server must be installed separately from the tool chain, which allows you to install it on a machine which does not run the tool chain. The installation is started from the Showroom (started by the initial setup.exe). The Remote Evaluation Board Access Server has its own manual.
This feature is only available for products on Windows. CrossView Pro on other platforms can connect to a server running on Windows.
The sizes and positions of detailed register windows (showing all bits of the register) are now saved and restored. The initial column width is set with the contents is fully visible.
In the register window configuration the registers are now grouped by peripheral. These groups are defined in the register definition files through the BLOCK directive. The register window configuration dialog has a check box to create a register window for each peripheral. These windows can be opened from the "View >> Register" menu.
The CrossView Pro configuration file has additional fields to specify a mirror address for a flash chip on address 0. This allows the flash chip to be programmed through its mirror address before switching the flash to address 0. This mirror address can also be specified from EDE on the Flash Setup page in the Project Options dialog.
You can configure CrossView Pro to suspend peripherals on a breakpoint when debugging with OCDS. The CrossView Pro configuration files support a PeripheralsStop key to specify this. Additional to this the OPSEN register must be configured at startup to select which peripherals are stopped. From EDE you can configure the OPSEN register from the Project -> Project Options dialog on the Application -> Startup -> OPSEN page. The CrossView Pro -> OCDS Communication Setup page has a checkbox to enable suspension of the peripherals on a breakpoint.
CrossView Pro requires the DLL ws2_32.dll which is not standard available on Windows 95 systems without any service pack installed. If you start up CrossView Pro and get a message that it cannot find the ws2_32.dll, you should either install Windows 95 Service Pack 1 or download the DLL
CrossView Pro requires the DLL shlwapi.dll which is not standard available on Windows 95 and Windows NT. When starting up CrossView Pro from the start menu you will get the message that it cannot find the shlwapi.dll. From EDE, CrossView Pro will simply not start. To solve this problem, you should install Internet Explorer version 5.0 or higher. These versions of Internet Explorer will install the shlwapi.dll.
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