This release note describes the changes and new features of all
TASKING TriCore products since v2.2r2. This pack contains workarounds
for new Silicon Bugs as well as updates for reported problems.
The following parts are described:
The solved and known problems are not part of this release note, they are described in the file
solved_2_2r3.html delivered with the product.
The main reasons for this release are:
Within menu 'Project | Project Options...' page 'Processor | Bypasses' the new silicon bug workarounds can be found.
The compiler inserts a NOP instruction between a context store operation, STUCX or STLCX, and a memory load operation which reads from the last double-word address written by the context store.
The compiler inserts a NOP instruction after each DISABLE instruction.
The assembler checks whether an address register load instruction, LD.A or LD.DA, targeting the A[10] register, is immediately followed by an operation causing a context switch.
The assembler checks whether a context store operation, STUCX or STLCX, is immediately followed by a memory load operation which reads from the last double-word address written by the context store.
The assembler checks if the DISABLE instruction is followed by a NOP instruction
The libraries have been updated to prevent new silicon bugs to trigger. The libraries are rebuild, using the new compiler and assembler.
Copyright 2005 Altium BV